Lead Integrated Photonics Simulation and Layout Engineer
Core
Lead the layout of state-of-the-art photonic integrated devices and circuits, supporting PDK development with commercial foundries and contributing to quantum photonic platforms.
Role type
Lead IC simulation and layout engineer (quantum photonics)
Builds
Parameterized component cell (PCell) libraries, automated layout workflows, and full-reticle tapeouts for quantum photonic devices
Domain
Quantum computing, integrated photonics, semiconductor manufacturing
Required skills
Photonic simulation (Lumerical, Tidy3D, COMSOL), Python-based layout tools (KLayout, gdsfactory, Luceda IPKISS), PDK development, full-reticle tapeout ownership, physical verification (DRC, LVS), diamond photonics, thin-film lithium niobate, ion trap photonics
Preferred skills
Agentic AI workflows, software engineering (version control, automation), distributed quantum computing architectures
Technologies
Lumerical, Tidy3D, COMSOL, KLayout, gdsfactory, Luceda IPKISS, Python
Responsibilities
Lead component design and layout for PDK development; Support design and layout for quantum photonic technologies; Own full-reticle tapeouts from floorplanning through GDS generation; Partner with fabrication and test teams to validate PDK components
Seniority
Lead, hands-on IC with mentorship
