YIELD ENHANCEMENT ENGINEER
Core
Analyze inline/param/probe/DOE data to identify yield detractors and drive continuous improvement in semiconductor manufacturing.
Role type
Yield Enhancement Engineer
Builds
Memory and storage solutions (DRAM, NAND, NOR)
Domain
Semiconductor manufacturing / Memory technology
Deliverable
production ML models
Required skills
Semiconductor device physics, Statistical process control (SPC), Design of Experiments (DOE), Root-cause analysis (FMEA, 8D), JMP, Python, SQL, Tableau, AI/LLM integration
Preferred skills
Automation, Machine learning, Defect inspection, Inline metrology, Memory architecture (DRAM/NAND), Technology transfer
Technologies
JMP, Python, SQL, Tableau, Copilot, YMS Genie, Agentic AI, LLMs
Responsibilities
Analyze inline/param/probe/DOE data to identify yield detractors; Apply semiconductor device physics and statistical tools to troubleshoot yield issues; Perform root-cause analysis using FMEA, 8D, SPC; Publish Pareto analyses and maintain dashboards; Support new technology transfer and process baseline setup; Conduct material, process, and equipment evaluations; Develop and maintain Tableau dashboards for yield monitoring; Leverage AI tools to automate engineering workflows and enhance diagnostic efficiency.
Seniority
Mid-level, hands-on IC