MGR, OMT TECH PI1 MB&ESPEC
Core
Lead a team of PI Margin Bin and ESPEC engineers to introduce new tech-nodes, optimize DRAM process flow, and ensure stable fab output and product quality in OMT.
Role type
Senior IC engineering manager (DRAM manufacturing)
Builds
New tech-node DRAM products and optimized process flows
Domain
Semiconductor manufacturing (DRAM)
Required skills
Engineering management, team leadership, project coordination, cross-functional collaboration, problem-solving, quality assurance, industry trend analysis
Preferred skills
Advanced degree in Engineering, experience with AI agent tools
Technologies
DRAM process flow, PI Margin Bin, ESPEC, AI agent tools
Responsibilities
Lead and manage a team of engineers to implement innovative solutions; Coordinate the development and execution of technical projects; Ensure flawless execution of projects adhering to quality standards; Collaborate with cross-functional teams to determine requirements; Provide mentorship to team members; Monitor and analyze project performance to identify improvements.
Seniority
Manager, hands-on leadership