Intern - Design Engineer, HBM
Core
Design, development, and validation of High Bandwidth Memory (HBM) products for AI, high-performance computing, graphics, and data-center applications.
Role type
Intern - Design Engineer (Semiconductor/Memory)
Builds
Next-generation HBM memory architectures and semiconductor solutions
Domain
Semiconductor / Memory / AI Hardware
Required skills
Digital logic design, CMOS circuits, Computer architecture, VLSI design, Semiconductor devices, Verilog, SystemVerilog, VHDL, Python, Perl, Tcl, C/C++
Preferred skills
Memory architectures (DRAM, SRAM, DDR, LPDDR, HBM), RTL design, Simulation, Synthesis, Timing analysis, Verification methodologies, Linux/Unix, EDA tools (VCS, Xcelium, Questa, PrimeTime, Innovus, Virtuoso), Functional coverage, Semiconductor development flows
Technologies
VCS, Xcelium, Questa, PrimeTime, Innovus, Virtuoso, Python, Perl, Tcl, C/C++, Verilog, SystemVerilog, VHDL
Responsibilities
Assist with design, simulation, analysis, and verification of HBM memory and logic circuits; Support RTL development, circuit implementation, timing analysis, power analysis, and functional verification; Develop scripting, automation, and AI-assisted workflows; Participate in design reviews, technical discussions, and debugging activities; Document technical work, experimental results, build methodologies, and AI-assisted insights
Seniority
Intern
