Clock / Power HW Validation Engineer
Core
Own end-to-end bare metal framework validation of Qualcomm mobile/server/compute SoC clock and power architectures.
Role type
Senior IC hardware validation engineer (clock/power)
Builds
Mobile, server, and compute System-on-Chip (SoC) clock and power architectures
Domain
Semiconductor / SoC Design / Hardware Validation
Required skills
C, Python, lab instruments (multimeter, oscilloscope, logic analyzer), pre-Si/post-Si debugging, ARM SoC debug methodology, test plan development, automation scripting
Preferred skills
Cross-compilers/linkers/makefiles, coherency and concurrency in SoC, PMIC/rail power validation, FPGA-based emulation platforms, RTL/Verilog/System Verilog, cross-functional matrix environment experience
Technologies
Python, Perl, Shell, C, JTAG, ARM, FPGA, Verilog, System Verilog
Responsibilities
Own E2E bare metal framework validation of SoC clock and power architectures; Develop and document test strategies and plans; Automate validation processes using scripting; Develop scalable device drivers and system tests; Review validation platform schematics for post-Si debug support; Debug complex issues on pre-Si and post-Si platforms; Use lab instruments for measurements and analysis
Seniority
Mid-level, hands-on IC
