SoC Debug Engineer, Senior Staff
Core
Lead bring-up, debug, and analyze failures at the embedded platform level for Server/Compute/Mobile chipsets in both pre-Si and post-Si phases.
Role type
Senior Staff SoC Debug Engineer
Builds
Server/Compute/Mobile chipsets
Domain
Semiconductor / SoC Design
Required skills
RTL inspection, JTAG debugging, Lab Equipment usage (Logic Analyzer, Scope, Signal Generator), Embedded platform debugging, Root cause analysis, PVT and marginality issue isolation
Preferred skills
C/Assembly/Python scripting, Power and performance optimization, TCU test methodology, CPU and SoC architectures, Server Boot Configuration, Server Reset Scenarios, Multi-die secure boot flow
Technologies
JTAG, Logic Analyzer, Oscilloscope, Signal Generator, RTL, C, Assembly, Python
Responsibilities
Lead Bring up and debug at the embedded platform level; Perform real-time debugging of server hardware components; Investigate manufacturing defects and implement corrective actions; Create debug strategies for partners to isolate failing components.
Seniority
Senior Staff, hands-on IC
