Algorithm Engineer, Senior - Hod Hasharon
Core
Research, design, develop, simulate, and validate systems-level software, hardware, architecture, and algorithms for ultra-high speed optical communication systems.
Role type
Senior Algorithm Engineer (Systems Engineering)
Builds
Ultra-high speed optical communication systems, ASIC implementations, and firmware/hardware solutions.
Domain
Telecommunications, Optical Communications, VLSI/ASIC
Required skills
Algorithm design, Systems engineering, Fixed-point design, Error correction codes, Simulation, FPGA/ASIC validation, Post-silicon testing, Hardware/Firmware integration
Preferred skills
High-speed communication (SerDes, PCIE), Optics expertise, Senior leadership interaction
Technologies
FPGA, ASIC, Simulation tools, SerDes, PCIE
Responsibilities
Research and develop algorithms for cutting-edge optical communication systems; Test and optimize system performance in simulation, FPGA, ASIC, and lab environments; Develop algorithms suitable for HW and FW implementation with cost/power/performance tradeoffs; Collaborate with FW, architecture, and VLSI teams for ASIC implementation and validation; Perform post-silicon activities including chip bring-up, testing, analysis, and optimization.
Seniority
Senior, hands-on IC
