CareerPlan

Post Silicon Validation -Sr/Lead/Staff Engineer

Hyderabad, Telangāna, IndiaFull-time2026-09-22 → 2026-11-10

Core

Develop suite of Multimedia/Imaging-cores, related drivers, and perform device/system level verification, validation, and debug in Emulation and Post-Silicon environments for high-performance, low-power world-class products.

Role type

Senior/Lead/Staff ASIC Validation Engineer (Multimedia/Imaging)

Builds

Multimedia/Imaging-cores, related drivers, test suites, and validation frameworks for Qualcomm SoCs.

Domain

Semiconductors / ASIC Design / Multimedia & Imaging

Required skills

C/C++, Python, Shell-scripting, RTOS, in-circuit emulation/debug tools, ARM Core validation, High-Speed interfaces (MIPI, USB, UFS, PCIe), Signal Integrity, Embedded SW/drivers, JTAG debugging, Lauterbach Trace32, low power design concepts, test automation, FPGA design, DFT/DFD, ATE/ATPG

Preferred skills

Machine Learning (TensorFlow, PyTorch), Deep Learning, Neural Networks, Verilog/System Verilog, Camera/Video Imaging concepts, RMA process

Technologies

C, C++, Python, Java, Shell, RTOS, ARM Coresight, TensorFlow, PyTorch, Verilog, System Verilog, FPGA, Lauterbach Trace32, MIPI, USB, UFS, PCIe

Responsibilities

Develop Multimedia/Imaging-cores and related drivers; perform device and system level verification, validation, and debug in Emulation and Post-Silicon; bring-up HW platforms and debug HW/SW issues; develop low-level/bare-metal code (C/C++); create test plans and automation scripts; collaborate with System-Architects, Designers, Verification, Firmware and Software engineers.

Seniority

Senior/Lead/Staff, hands-on IC