CPU Staff/Senior Staff Engineer – ARM GIC & CPU Post-Silicon Validation
Core
Post-silicon validation of ARM GICv3/GICv4 interrupt controllers and CPU interrupt subsystems, ensuring correct behavior across power states, OS interactions, and stress scenarios.
Role type
Senior IC hardware validation engineer (CPU/SoC)
Builds
Production SoCs with validated interrupt routing and power management
Domain
Semiconductor hardware engineering, ARM architecture
Required skills
ARMv8/ARMv9 architecture, ARM GICv3/GICv4 architecture, C/C++ programming, Python scripting, shell scripting, JTAG/debugging, system-level debugging, stress test development
Preferred skills
Multicore SoC validation, virtualization/hypervisor knowledge, DVFS and low-power state debugging, validation scenario design
Technologies
ARM GICD, GICR, ITS, SGI, PPI, SPI, LPI, JTAG, C/C++, Python
Responsibilities
Develop and execute post-silicon validation plans for ARM GICv3/GICv4 and CPU interrupt subsystems; Validate GIC components including Distributor, Redistributor, CPU interface, and ITS; Debug complex issues involving lost interrupts, unexpected routing, and latency; Analyze GIC registers and validate interactions with OS/kernel, firmware, and hypervisor; Develop automation and stress workloads for interrupt validation; Track validation coverage and defects through engineering systems.
Seniority
Senior, hands-on IC
