Product Test Development Engineer, Senior (QFPROM)
Core
Develop test contents and strategies for Fuse and Security IP from pre-silicon to high volume manufacturing phases, triaging silicon failures and supporting yield analysis.
Role type
Senior Product Test Development Engineer (Hardware/Security IP)
Builds
Test vectors, test methods, and validation strategies for Fuse/Security IP bring-up on silicon.
Domain
Semiconductor hardware engineering, security IP, and high-volume manufacturing.
Required skills
Silicon validation and bring-up, ATE platform operation (Advantest 93K, Teradyne UltraFlex), Java/C++ programming, Fuse sense and programming, root cause analysis, failure mode analysis.
Preferred skills
Cryptography concepts in silicon, digital testing and design verification, test vector development for tester bring-up.
Technologies
Advantest 93K, Teradyne UltraFlex, Java, C++.
Responsibilities
Work on Fuse and Security IP during the whole project phase; Triage and debug failures on Silicon; Support Test issues, Failure mode analysis and yield issues analysis related to Fuse IP; Develop test contents and testing strategies to assist on Fuse bring up on silicon.
Seniority
Senior, hands-on IC
