ASIC Methodology Engineer
Core
Develop STA methodology and signoff, foundry technology enablement, design automation, and low power architecture platforms for Qualcomm's SOC products.
Role type
Senior IC ASIC Methodology Engineer
Builds
Design analytics platforms, EDA tools, and optimization platforms for power, performance, area, and quality.
Domain
Semiconductor / ASIC Design / Static Timing Analysis
Deliverable
production ML models
Required skills
Python, Static Timing Analysis (STA) tools (PrimeTime, Tempus), ASIC/VLSI design flows, Problem-solving
Preferred skills
Software architecture, GenAI/LLMs, Agentic AI systems, Version control (Perforce, Git), Place & Route tools
Technologies
PrimeTime, Tempus, Python, Perforce, Git
Responsibilities
Enable state-of-the-art design analytics platforms, work with core and SOC teams, develop design automation and internal/external EDA tools, perform design analysis and optimization.
Seniority
Mid-Senior, hands-on IC