ASIC Design Engineer (Hardware Security)
Core
Design hardware security solutions for premium Snapdragon chip sets, covering the full flow from architecture to silicon testing.
Role type
Senior IC ASIC Design Engineer (Hardware Security)
Builds
Security IP and countermeasures for mobile SoCs
Domain
Semiconductor / Hardware Security
Required skills
ASIC design flow, RTL design (Verilog/SystemVerilog), Clock Domain Crossings, DFT, Synthesis, Timing closure, Bus protocols, Debug concepts
Preferred skills
Microcontroller CPUs, System level architecture, Analog/Digital IP integration, High-speed/Low Area/Low Power architecture, Hardware security (Root of Trust, RNG, Crypto, side-channel, ECC), Verification, Test planning
Technologies
Verilog, SystemVerilog, AHB, AXI, SoC, Snapdragon
Responsibilities
Define architecture and microarchitecture for security features, Develop RTL designs and perform synthesis/timing closure, Integrate analog and digital IP blocks, Conduct silicon test planning and validation, Collaborate with cross-functional teams on security product creation
Seniority
Senior, hands-on IC
