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Yield Enhancement DRAM DA

Boise, Idaho, United States of America💼 Full-time🗓 2026-09-16 → 2026-09-25

Core

Characterize electrical data to identify device issues impacting yield and develop end-of-line performance predictions using machine learning for next-generation memory solutions.

Role type

Yield Analysis (DA) Engineer

Builds

Next-generation memory solutions (DRAM)

Domain

Semiconductor manufacturing / Memory

Deliverable

production ML models | dashboards & analysis

Required skills

Semiconductor processing knowledge, CMOS operation, memory cell operation, statistical analysis, data extraction and reporting, programming (Python, R, SQL, JavaScript), machine learning techniques

Preferred skills

Device physics knowledge, cross-functional team leadership, process improvement methodologies

Technologies

Python, R, SQL, JavaScript, Machine Learning, AI

Responsibilities

Analyze end-of-line test, parametric, and fab data to identify yield-impacting issues; Develop new tools for yield analysis and implement ML/AI techniques; Identify interactions between process modules to detect fail mechanisms; Use inline data to drive process improvements; Standardize methods to ensure consistent and repeatable processes; Lead or participate in multi-area focus teams to troubleshoot complex yield issues; Provide feedback on design and process issues to R&D teams; Support transfer of new parts from R&D to manufacturing sites

Seniority

Mid-Senior (5+ years experience required)

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