Sr Design Engineer, DEG Design Method
Core
Design, optimize, and verify block-level circuits for DRAM projects, bringing innovative circuit designs from concept to silicon.
Role type
Senior IC design engineer (mixed-signal/analog)
Builds
DRAM memory products
Domain
Semiconductor / Memory and storage
Required skills
Mixed-signal IC design, Analog IC design, Digital IC design, SPICE simulation, Verilog modeling, Regulator design, Charge pump design, Oscillator design, Current reference design, Bandgap design, Comparator design, Agentic AI systems, GenAI systems, UNIX, Cadence design environment, Synopsys tools
Preferred skills
Cross-functional circuit debugging, Post-layout simulation, Schematic design, SPF extraction
Technologies
SPICE, Verilog, Cadence, Synopsys, UNIX
Responsibilities
Design, optimize, and verify block-level circuits for DRAM projects; Compare silicon performance with simulation results and support correlation activities; Collaborate with process integration and modeling teams on new process node development; Partner with global design groups and provide layout guidance through post-layout simulation
Seniority
Senior, hands-on IC
