CareerPlan

Section Manager, Wafer Probe & Test Engineering

Tainan City, Tainan City, TaiwanFull-time2026-08-05 → 2026-10-20

Core

Lead wafer probe engineering team to drive manufacturing excellence, equipment performance, and yield optimization in semiconductor manufacturing.

Role type

Senior IC Section Manager (Wafer Probe & Test Engineering)

Builds

Wafer probing operations and test equipment performance

Domain

Semiconductor manufacturing (Memory/Storage)

Required skills

Wafer probe engineering, ATE tester operation (Teradyne/Advantest), Prober equipment, Yield analysis, Probe card behavior, Wafer test flow, Team leadership, SOP development, Data-driven decision making

Preferred skills

DRAM/memory testing experience, High-volume manufacturing environment, US-based company experience, Ownership mindset, Proactive problem solving

Technologies

Teradyne, Advantest

Responsibilities

Lead and manage wafer probe engineering team to achieve quality, output, and cycle time targets; Drive probe card, tester, and prober equipment performance optimization (OEE, UPH, yield); Collaborate with cross-functional teams to resolve excursion and yield issues; Establish and improve standard operating procedures (SOP) and best practices; Develop engineering talent and leadership pipeline; Implement data-driven decision making and continuous improvement initiatives

Seniority

Senior, hands-on IC with leadership responsibilities