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EUV Lithography Process Development Engineer- TPG

Boise, Idaho, United States of America💼 Full-time🗓 2026-07-17 → 2026-09-28

Core

Lead pathfinding efforts for advanced patterning technologies (193nm immersion, EUV, High NA EUV) to enable next-generation memory scaling and production readiness.

Role type

Senior IC lithography process development engineer

Builds

Next-generation memory storage solutions

Domain

Semiconductor manufacturing / Lithography

Deliverable

production ML models | product features

Required skills

EUV lithography expertise, 193nm immersion multiple patterning (LELE, SAQP), photolithography optics knowledge, simulation tools (Prolith, S-Litho), process transfer alignment

Preferred skills

High NA EUV pathfinding experience, statistical analysis and design of experiments, JMP/Python, AI-assisted analytics

Technologies

EUV tools, 193nm immersion scanners, Prolith, S-Litho, JMP, Python

Responsibilities

Develop and optimize EUV lithography modules in technology development environment, partner with defect inspection and mask teams to define inspection strategies, collaborate with manufacturing sites to align process transfer and equipment readiness, travel to support High NA EUV development activities

Seniority

Senior, hands-on IC

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