Staff Networking/Interoperability Validation Engineer (Switches/NICs/AEC/Transceivers)
Core
Design, develop, and execute interoperability test plans for Marvell networking products (switches, NICs, transceivers) across multi-vendor platforms, validating device compatibility and driving root cause resolution using automated frameworks and AI agents.
Role type
Staff Networking/Interoperability Validation Engineer
Builds
Interoperability test plans and automated test frameworks for high-speed interconnects (800G, 1.6T)
Domain
Semiconductor / High-speed networking / Data center infrastructure
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Interoperability test plan design, automated test framework development, PHY-layer validation (SerDes, PAM4/NRZ, FEC), networking protocols (Ethernet, IP, BGP, OSPF), data center topologies (spine-leaf, fat-tree), AI/LLM frameworks for test automation, scripting, network CLI commands
Preferred skills
MS/PhD in CE/EE, 1-3+ years experience, customer engagement for test coverage definition
Technologies
Python, AI agents, LLMs, I2C, SPI, SMI interfaces, 800G/1.6T standards
Responsibilities
Design and execute interoperability test plans across multi-vendor environments; Analyze test results and identify failure modes; Validate PHY-layer behavior including SerDes link bring-up and signal integrity; Leverage AI frameworks to accelerate data analysis and test automation; Document test methodologies and findings; Engage with customers and partners to define test coverage; Evaluate and improve test infrastructure
Seniority
Staff, hands-on IC with strategic impact