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Digital Failure Analysis Engineer (R&D)

Lehi, UT, United States💼 Full-time🗓 2026-07-16 → 2026-07-22

Core

Perform electrical investigative work on defect, performance, and design-related issues during technology development to deliver qual-capable and high-yielding devices.

Role type

Electrical Failure Analysis Engineer (R&D)

Builds

Semiconductor devices

Domain

Semiconductor manufacturing and design

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

electrical failure analysis, memory mapping, ATPG diagnostics, root-cause investigation, electrical failure characterization, defect mechanism determination, cross-functional debug, physical correlation, semiconductor fabrication process understanding, SEM/TEM/FIB/EDS/EELS image interpretation, scan test data interpretation, shmoos interpretation, digital circuit operation knowledge, scan-based test methodologies, photon emission analysis, laser-assisted fault isolation, waveform acquisition, digital IC design, mixed-signal IC design, memory mapping tools, ATPG diagnostics (Cadence Modus, Synopsys Tetramax, Avalon layouts)

Preferred skills

strong understanding of semiconductor fabrication processes, experience interpreting SEM/TEM/FIB/EDS/EELS images and analysis results, experience interpreting scan test data and shmoos, familiarity with digital circuit operation and scan-based test methodologies, experience using electrical failure analysis techniques such as photon emission analysis, laser-assisted fault isolation, waveform acquisition, or similar FA instrumentation, experience with digital IC design, mixed-signal IC design, or related design environments, familiarity with memory mapping tools, ATPG diagnostics like Cadence Modus and Synopsys Tetramax and Avalon layouts

Technologies

Cadence Modus, Synopsys Tetramax, Avalon layouts

Responsibilities

Collect and analyze debug data from internal FA test capability and collaboration with Test Engineering using memory mapping and ATPG diagnostic tools to identify failure signatures and guide root-cause investigation. Perform electrical failure characterization using production and custom test patterns in a bench test environment to isolate failing circuitry and determine defect mechanisms across wafer yield investigations, qualification issues, quality excursions, and customer returns. Work with Test Engineering, design teams, and Physical Failure Analysis (PFA) laboratories to correlate electrical failure signatures with physical defects and enable defect isolation.

Seniority

Mid-Senior, hands-on IC

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