Hardware Engineering Technical Leader (onsite) - 2014979
Required skills
Bachelor's, Master's or Ph.D. degree in Electrical Engineering, Computer Engineering, Computer Science, or related field; 8+ years of experience in ASIC bring-up, system validation, networking test, or hardware/software integration; Experience with Linux systems and debugging tools; Programming/scripting experience (Python, C/C++, or similar); Hands-on experience with system-level debugging and familiarity with lab equipment like MMs, Oscilloscopes; Experience with Test Data Analysis and familiarity with tools like jmp, pandas or other data analysis tools.
Preferred skills
Familiarity with high-speed interfaces (Ethernet 25G/100G/400G, PCIe); Product and Test Engineering background; Experience testing network operating systems (NX-OS, IOS-XR, or similar); Knowledge of traffic generators (Ixia, Spirent) and network test tools; Knowledge of networking fundamentals (TCP/IP, routing, switching); Experience with automation frameworks and large-scale testbeds.
Technologies
Python, C/C++, Linux, MMs, Oscilloscopes, jmp, pandas, NX-OS, IOS-XR, Ixia, Spirent.
Responsibilities
Leads the innovation, design and architecture of new hardware products, services and solutions; Re-enforces guidelines/standards within and outside of ownership; Oversees development of testing and issue resolution approach; Develops approach to verifying products against Cisco and industry quality standards; Provides technical knowledge to engineering teams; Mentors peers or others on the team; Facilitates/encourages knowledge sharing in the team; Define and execute system-level validation strategies for complex networking platforms; Validate end-to-end functionality across hardware, OS, and networking software stacks; Perform feature, regression, interoperability, and scale testing; Develop automated test frameworks using Python, C/C++, or similar languages; Build scalable validation environments for high-throughput networking systems; Integrate tests into CI/CD pipelines for continuous validation; Design and execute tests for throughput, latency, packet loss, and scale limits; Validate system behavior under high traffic loads and real-world network conditions; Analyze system performance across L2/L3 protocols and data center workloads; Debug complex issues spanning ASICs, firmware, drivers, and network OS; Perform root cause analysis using logs, traces, and lab instrumentation; Collaborate with design and software teams to resolve issues efficiently; Partner with ASIC, hardware design, software, and architecture teams; Influence design decisions by identifying system-level risks early; Work with customers and field teams to reproduce and resolve issues; Drives innovation on medium-to-large features from technical design through completion and mentors others; Drives the Hardware Engineering strategy within the group and Cisco, and ensures cross functional collaboration on projects.
Seniority
Technical Leader.
Domain
Hardware Engineering, Networking, System Validation.