PHY Post Silicon Validation Engineer
Core
Post-silicon validation engineer for PHY and SerDes communication IP, developing automation infrastructure and tools for debugging, validation, and optimization of DSP-based silicon systems.
Role type
Post-silicon validation engineer (PHY/SerDes)
Builds
Automation infrastructure and tools for post-silicon validation of complex silicon devices
Domain
Networking hardware, Silicon design, DSP architectures
Required skills
C++, C#, Python, Post-silicon validation, DSP architecture debugging, Automation development
Preferred skills
Communication and signal processing, Linux, Git, Database development, GUI development, Jenkins DevOps
Technologies
C++, C#, Python, Linux, Git, Jenkins, DSP
Responsibilities
Develop automation infrastructure and tools for post-silicon validation, Debug and validate DSP-based silicon systems, Optimize DSP architectures, Work on PHY FW, calibrations, and system definitions
Seniority
Mid-level, hands-on IC
