Emulation Engineer
Core
Develop pioneering emulation environments and infrastructure to evaluate the performance and functionality of multi-terabit networking systems and complex ASICs.
Role type
Emulation Engineer (Hardware Validation)
Builds
Emulation infrastructure and test environments for Cisco Silicon One and Nexus systems
Domain
Networking hardware, ASIC design, Silicon validation
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Emulation platform experience (Palladium, Veloce, Zebu), C/C++, TCL, RTL development, System debug tools (gdb, waveform debuggers), Test plan design, Traffic generation
Preferred skills
Python/Perl scripting, UVM, System Verilog, Post-silicon functional validation, Protocol knowledge (PCIe, I2C, Ethernet)
Technologies
Palladium, Veloce, Zebu, C, C++, TCL, OpenStack, Docker, Open vSwitch, gdb, UVM, System Verilog
Responsibilities
Develop emulation environments for multi-terabit system evaluation, Develop emulation infrastructure using C/C++ and TCL, Work with design, DV, power, and post-silicon diagnostic teams, Assist with test plan design, implementation, and debugging, Develop tests to generate complex traffic and performance scenarios, Solve issues with leading emulation team members
Seniority
Mid-Senior level (5+ years or 3+ years with Masters)
