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HW Engineer

San Jose, California, US💼 Full-time💰 $152,500–$152,500🗓 2026-03-26 → 2026-09-26

Core

Operate and evolve a world-class hardware lab environment to support the full lifecycle of silicon and hardware development, including ASIC bring-up, validation, and system debug.

Role type

Senior Hardware Lab Engineer (ASIC/SoC bring-up)

Builds

ASICs, SoCs, and hardware prototypes for Cisco Silicon One

Domain

Semiconductor hardware engineering / Silicon validation

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

ASIC/SoC bring-up and validation, hardware lab operations, failure analysis, EVB development, lab equipment operation (oscilloscopes, logic analyzers, power supplies), socket/pogo pin handling, cross-functional collaboration

Preferred skills

Hardware-oriented troubleshooting, continuous improvement of lab processes

Technologies

Oscilloscopes, logic analyzers, power supplies, thermal tools, automation tools

Responsibilities

Manage day-to-day operation of the hardware lab, ensure lab readiness for critical milestones, provide hands-on technical support for EVB bring-up and debug, manage lab infrastructure and resources, coordinate lab usage across global teams, interface with external vendors for equipment and manufacturing support

Seniority

Senior, hands-on IC

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