RFIC Design Engineer
Core
Design and deliver radio transceiver building blocks (TX, RX, PLL-LOGen) and chains for wireless SoCs, driving them to mass production for Apple's connectivity products.
Role type
Senior IC RFIC Design Engineer
Builds
Radio transceiver building blocks and chains for wireless connectivity SoCs
Domain
Wireless communications, RF CMOS, Analog/Mixed-Signal IC design
Required skills
RF/analog and mixed-signal circuit design, Transistor-level feasibility studies, Power/area/performance trade-off analysis, Cadence Virtuoso, Spectre RF, EM simulation (EMX, HFSS), Silicon characterization and debugging, Design of LNAs, PAs, PLL/VCO/DCO/LOGen blocks, mixers, baseband filters, data converters
Preferred skills
Wireless transceiver mass production experience, RF transceiver architecture trade-offs, Modulation impact on radio architecture, Mixed-signal mode verification methodology (SystemVerilog, AMS, Nanotime), Digital-analog domain partitioning
Technologies
Cadence Virtuoso, Spectre RF, Matlab, EMX, HFSS, SystemVerilog, AMS, Nanotime
Responsibilities
Hands-on design contributions from concept to transistor-level, Design and deliver radio transceiver building blocks and chains, Work with RF Systems on block-level specifications and spec margin distribution, Design RF and Analog loopbacks for calibration, Address Co-Existence scenarios, Collaborate with test engineers on chip debugging and optimization, Provide design versus silicon measurements correlation
Seniority
Senior, hands-on IC