SoC Physical Design Engineer, Electrical Analysis
Core
Driving electrical analysis and verification of System-on-Chip (SoC) designs, focusing on power integrity, electromigration, noise, and signal integrity at block and chip levels.
Role type
Senior IC physical design engineer (electrical analysis)
Builds
SoC chips for Apple hardware products
Domain
Semiconductor / VLSI / SoC physical design
Required skills
Low-power circuit design, computer architecture, digital systems, EDA backend tools (Redhawk, PrimeRail, Voltus), ASIC/AMS physical implementation, verification flow automation, Innovus, Design Compiler, PrimeTime, Tempus, voltage drop budgeting, SPICE simulation
Preferred skills
EMIR test planning, tape-out sign-off, power integrity signoff, cross-functional engineering management
Technologies
Redhawk, PrimeRail, Voltus, Innovus, Design Compiler, PrimeTime, Tempus, SPICE
Responsibilities
Perform electrical analyses (Gridcheck, ESD, Static/Dynamic IR, EM, Noise, Signal EM) at block or chip level; Collaborate with CAD/library/circuit technology/system teams for tech/flow evaluation and validation; Work with implementation teams for EMIR test planning and sign-off closure; Manage schedules and support cross-functional engineering efforts
Seniority
Senior, hands-on IC
