Failure Analysis Technical Leader (Hybrid)
Required skills
Bachelor's degree in electrical or computer engineering, 8+ years of related experience, Experience with High-Speed Network Interfaces, Hands-on board design expertise, Familiarity with board design tools such as Cadence Allegro or similar tools, Hardware design, schematics generation, and design validation for service provider routing products, Experience with sophisticated high speed board design and board bring-up, Knowledge of Cisco products
Preferred skills
Master's degree in electrical or computer engineering, Experience with high-speed SERDES (>=25G) system design, signal integrity issues, and power distribution techniques, Ability to collaborate with eCAD, FPGA, Power, Mechanical, Signal integrity, and Manufacturing teams, Familiarity with leading-edge CPUs such as Intel or AMD, analog and networking components such as PCIe switches, PHY, retimers, voltage regulators, Experience in unit test methodologies and agile working environment along with sophisticated CPU design and bring-up
Technologies
Cadence Allegro, High-Speed Network Interfaces, SERDES, PCIe switches, PHY, retimers, Intel, AMD
Responsibilities
Drive improvements in the accuracy of the fault duplication and isolation, Provide direction and techniques on customer issues, Engage Design engineering and communicate findings and resolutions for HW and SW field issues, Coordinate the Failure Analysis cases review meeting with Cisco teams and suppliers, Defect-detection including containment analysis, Work closely with a multi-functional team to accelerate replicate customer reported issues, Articulate key technical issues to customers, Ensure EMS partners deliver timely and accurate results in duplicating, isolating root cause of customer issues, Drive innovation, new technology/processes, Organize, plan, track and close-out design, components, and manufacturing issues, Evolving the Product debug document over the Product Life Cycle, Responsible for communication on key issues along with quality group to design engineering, accounts and escalation teams, Proactive engagement with customer facing teams on reducing RMA, rightsizing FA, and getting more debug and troubleshooting information from Field, Collaborate with PQE/CEs and drive Corrective/ Preventive action, Participate in initiatives to enhance existing test strategies, methodologies and test/diagnostic coverage for field returns
Seniority
Senior (8+ years of experience)
Domain
Hardware Engineering, Failure Analysis, Network Interfaces