SoC Hardware (Power Management) Validation Engineer
Core
Own post-silicon validation and debug of Power Management features across CPU cores, mesh, memory, I/O, package, and platform power domains for custom SoC designs.
Role type
Senior IC SoC Hardware Validation Engineer (Power Management)
Builds
Custom SoC designs delivering high-performance functions with optimized power efficiency.
Domain
Semiconductor / SoC Design / Power Management
Required skills
Post-silicon validation, Root-cause analysis, Validation strategy definition, Automation framework development, Debug tool development, Telemetry analysis, Silicon bring-up, Power-performance correlation, Pre-silicon verification influence, Technical leadership, Mentoring
Preferred skills
Analog validation, Verification, Logic development, FPGA/Emulation experience, Board level schematic understanding, System level software/firmware knowledge
Technologies
SoC, CPU cores, Mesh, Memory, I/O, DVFS, Thermal management, Power states, Firmware, System software
Responsibilities
Develop and execute comprehensive validation strategies for power states, DVFS, idle and active power management, thermal management, and performance-per-watt optimization. Drive root-cause analysis of complex silicon, firmware, hardware, and software issues impacting power, performance, stability, and feature readiness. Define validation requirements, test plans, methodologies, automation frameworks, debug tools, and telemetry solutions. Lead silicon bring-up, feature characterization, workload-based validation, and power-performance correlation activities. Analyze power, performance, and thermal telemetry to identify bottlenecks and optimize platform efficiency. Provide technical leadership, mentoring, and guidance in Power Management architecture and debug methodologies. Influence pre-silicon verification strategies using post-silicon learnings.
Seniority
Senior, hands-on IC with mentoring responsibilities
