CareerPlan

Hardware Engineer - CTJ - POLY

United States, Washington, RedmondFull-time2026-10-12 → 2026-11-10
Security clearance required

Core

Execute system-level end-to-end debug solutions for scale datacenter systems, leading root cause analysis and defect reduction projects.

Role type

Senior Hardware Engineer (System Level Debug)

Builds

Data center solutions and mission-critical services

Domain

Cloud and Datacenter infrastructure

Required skills

System-level debug methodologies, Root cause analysis, Test strategy development, Automation for debug efficiency, Modern computer architecture knowledge, RAS features, Virtualization technologies, Memory Controllers, Central Processing Units, Storage solutions, Networking solutions, Data analytical skills

Preferred skills

Deep dives into cloud native operating systems, Platform or system level validation

Technologies

Datacenter infrastructure, Cloud native operating systems, Virtualization technologies

Responsibilities

Execute system level end to end debug solutions, Lead collaboration projects with hardware, firmware and software teams, Develop world class at scale debug methodologies and test routines, Solve problems relating to mission critical services, Build automation to drive debug efficiency, Lead technical deep dives into software solutions

Seniority

Senior, hands-on IC