Principal SOC Modeling Architect
Core
Lead resolution of complex system-level challenges spanning virtual platforms, firmware, silicon architecture, and validation infrastructure to define architectural direction for SystemC/TLM-based virtual platforms supporting multiple generations of Azure silicon.
Role type
Principal SOC Modeling Architect
Builds
SystemC/TLM-based virtual platforms, reusable modeling frameworks, and validation infrastructure for Azure silicon generations.
Domain
Semiconductor hardware design, virtual prototyping, and system-level validation.
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
SystemC and TLM-2.0 modeling, SoC architecture, interconnects, IP integration, firmware development, simulation performance optimization, hybrid/emulation environment expertise, C/C++ development, technical leadership, root-cause analysis.
Preferred skills
Experience with Synopsys Virtualizer, Arm Fast Models, Cadence Helium, ZeBu, HAPS, Palladium, Protium, PCIe, USB, memory subsystems, boot flows, platform services.
Technologies
SystemC, TLM-2.0, Synopsys Virtualizer, Arm Fast Models, Cadence Helium, ZeBu, HAPS, Palladium, Protium, C, C++
Responsibilities
Define architectural direction for SystemC/TLM-based virtual platforms; Design and develop SystemC/TLM-2.0 models for complex SoC subsystems; Develop and debug low-level firmware and validation software; Analyze and optimize simulation performance and scalability; Contribute to architectural integration of virtual platforms with emulation and prototyping systems; Build organizational capability by enabling engineers to maintain and extend solutions.
Seniority
Principal, hands-on IC with strategic influence
