CareerPlan

Senior Security IP Engineer

United States, California, Mountain ViewFull-time2026-08-03 → 2026-11-11

Core

Own end-to-end development of security IPs from architecture definition through silicon validation, implementing hardware security technologies like cryptographic accelerators and root-of-trust.

Role type

Senior IC security IP engineer

Builds

High-performance, power-efficient security IP solutions for SoCs

Domain

Semiconductor hardware design, hardware security

Required skills

End-to-end IP development, RTL design, PPA optimization, CDC/RDC/LINT closure, cryptographic accelerator design, root-of-trust implementation, silicon bring-up, design reviews, automation

Preferred skills

Cryptography standards (AES, SHA, ECC), leading-edge node experience (5nm+)

Technologies

Verilog, System Verilog, Python, Perl, AMBA AXI

Responsibilities

Define microarchitecture and RTL for security IPs, lead design signoff (CDC, RDC, LINT, synthesis, STA), drive pre/post-silicon debug and root-cause analysis, mentor engineers, collaborate with SoC/firmware/verification teams

Seniority

Senior, hands-on IC