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Principal AI Hardware Architect

United States, California, Mountain View💼 Full-time🗓 2026-07-20 → 2026-07-27

Core

Lead performance analysis, profiling, and analytical modeling across GPU and AI accelerator architectures to identify bottlenecks and drive perf/W and TCO optimization.

Role type

Principal AI Hardware Architect

Builds

AI training and inference workloads on production-scale systems

Domain

Semiconductor hardware design and AI systems

Deliverable

production ML models

Required skills

GPU and AI accelerator architecture analysis, analytical performance modeling, silicon measurement correlation, kernel-level optimization, Python programming, C/C++ programming, AI workload characterization, root-cause analysis, distributed training/inference framework knowledge, quantization and sparsity techniques

Preferred skills

Experience with PyTorch, vLLM, SGLang, Flash Attention, KV-cache management, communication-computation overlap strategies

Technologies

PyTorch, vLLM, SGLang, C/C++, Python

Responsibilities

Lead performance analysis, profiling, and benchmarking across GPU and AI accelerator architectures; Analyze end-to-end AI workloads and serving systems to understand performance and scalability drivers; Develop performance and system-level models to evaluate architectural features and innovations; Correlate silicon measurements with architectural models to guide future design decisions; Design and develop data analysis and performance modeling tools; Partner with architecture, compiler, and systems teams to influence product roadmaps; Present performance findings and architectural recommendations to senior technical leadership

Seniority

Principal, hands-on IC with strategic influence

Rewrite
## About the role Lead performance analysis, profiling, benchmarking, and analytical modeling across GPU and AI accelerator architectures, identifying bottlenecks, architectural trade-offs, and optimization opportunities across hardware, software, and system layers. Analyze end-to-end AI workloads and serving systems, including model execution, runtime behavior, memory systems, communication collectives, and workload mapping strategies to understand performance, scalability, efficiency, and cost drivers. Develop performance, efficiency, and system-level models to evaluate new architectural features, memory and interconnect innovations, collective communication mechanisms, and accelerator design choices, driving perf/W and TCO optimization. Correlate silicon measurements, software traces, and kernel execution behavior with architectural models and simulators to validate assumptions, improve model fidelity, and guide future architecture decisions. Drive kernel-level, runtime-level, and system-level performance optimizations across AI training and inference workloads, translating workload insights into actionable hardware and software improvements. Design and develop data analysis, correlation, visualization, and performance modeling tools that improve debugging efficiency, architectural insight, and decision-making velocity. Partner closely with architecture, microarchitecture, compiler, runtime, networking, and systems teams to evaluate design trade-offs and influence product roadmaps through quantitative analysis and technical leadership. Present performance findings, architectural recommendations, and design trade-offs to senior technical leadership through architecture reviews, technical reports, and strategic planning discussions. ## Requirements * Master's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field AND 7+ years technical engineering experience * OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field AND 8+ years technical engineering experience * OR equivalent experience * MS or PhD in Computer Architecture, Computer Systems, Electrical Engineering, Machine Learning, High-Performance Computing, or a related field * 4+ years of experience in Computer Architecture, AI Systems, or closely related technical domains * Understanding of GPU and AI accelerator architectures, including compute pipelines, memory hierarchies, interconnects, collective communication, and parallel execution models * Experience with analytical performance modeling, architectural simulation, workload characterization, and silicon correlation for accelerator and system design * Expertise in performance profiling, benchmarking, and root-cause analysis using hardware counters, software traces, and workload-level measurements * Hands-on experience analyzing and optimizing AI kernels, with the ability to connect kernel behavior to architectural and system-level performance * Experience developing performance, efficiency, or TCO models to evaluate architectural features, memory systems, networking, and large-scale AI deployments * Programming skills in Python and C/C++ for performance analysis, tooling, benchmarking, automation, and data analysis * Understanding of AI and HPC workloads, including training and inference of large-scale transformer-based models * Experience running and analyzing end-to-end AI workloads on production-scale systems, with the ability to diagnose bottlenecks across hardware, runtime, networking, and system layers * Familiarity with modern AI frameworks and serving stacks, including PyTorch, vLLM, SGLang, and distributed training or inference frameworks * Knowledge of modern AI optimization techniques, including quantization, sparsity, sharding strategies, KV-cache management, Flash Attention, and communication-computation overlap * Written and verbal communication skills, with experience presenting architectural analyses, performance studies, and design recommendations to technical stakeholders and leadership ## Nice to have * MS or PhD in Computer Architecture, Computer Systems, Electrical Engineering, Machine Learning, High-Performance Computing, or a related field * Experience developing performance, efficiency, or TCO models to evaluate architectural features, memory systems, networking, and large-scale AI deployments * Familiarity with modern AI frameworks and serving stacks, including PyTorch, vLLM, SGLang, and distributed training or inference frameworks * Knowledge of modern AI optimization techniques, including quantization, sparsity, sharding strategies, KV-cache management, Flash Attention, and communication-computation overlap ## What we offer * Opportunity to lead performance analysis, profiling, benchmarking, and analytical modeling across GPU and AI accelerator architectures * Chance to identify bottlenecks, architectural trade-offs, and optimization opportunities across hardware, software, and system layers * Ability to analyze end-to-end AI workloads and serving systems, including model execution, runtime behavior, memory systems, communication collectives, and workload mapping strategies * Role in developing performance, efficiency, and system-level models to evaluate new architectural features, memory and interconnect innovations, collective communication mechanisms, and accelerator design choices * Opportunity to drive perf/W and TCO optimization * Chance to correlate silicon measurements, software traces, and kernel execution behavior with architectural models and simulators * Ability to drive kernel-level, runtime-level, and system-level performance optimizations across AI training and inference workloads * Opportunity to design and develop data analysis, correlation, visualization, and performance modeling tools * Role in partnering closely with architecture, microarchitecture, compiler, runtime, networking, and systems teams * Chance to influence product roadmaps through quantitative analysis and technical leadership * Opportunity to present performance findings, architectural recommendations, and design trade-offs to senior technical leadership ## About us * We are looking for a Lead Performance Engineer to join our team. * The role involves working with GPU and AI accelerator architectures. * We value technical leadership and quantitative analysis. * Our team includes experts in architecture, microarchitecture, compiler, runtime, networking, and systems. * We focus on driving perf/W and TCO optimization. * We use modern AI frameworks and serving stacks, including PyTorch, vLLM, SGLang, and distributed training or inference frameworks. * We employ modern AI optimization techniques, including quantization, sparsity, sharding strategies, KV-cache management, Flash Attention, and communication-computation overlap. * We value written and verbal communication skills.
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