SDE, MLA hardware/software co-design, Annapurna Labs Machine Learning Acceleration
Core
Driving pre-silicon hardware/software co-development for machine learning chips by building new silicon functionality and verifying SoC performance.
Role type
Senior IC embedded software engineer (hardware co-design)
Builds
New silicon functionality for machine learning accelerators
Domain
Semiconductor hardware design and embedded software
Deliverable
production ML models
Required skills
bare-metal software development, SoC verification, embedded system development, debugging architecture and algorithms, logic verification from IP blocks to full system
Preferred skills
formal verification techniques, automation scripting (Python/Perl), ARM and DSP ISAs, RF standards (4G/5G NR, WiMAX, 802.11ad)
Technologies
Python, Perl, ARM, DSP ISAs
Responsibilities
Write bare-metal software to verify end-to-end SoC functionality, collaborate with architecture and emulation teams to build silicon features, debug architecture, algorithms, and performance issues
Seniority
Senior, hands-on IC
