CareerPlan

SE - Chip Methodology & Automation Intern

Sophia Antipolis, FranceInternship€27k2026-10-09 → 2026-10-21
No visa sponsorship

Core

Analyze, develop, and improve the SoC development environment by automating the service-delivery lifecycle for the CAD environment.

Role type

Intern, Chip Methodology & Automation

Builds

Automated service-delivery lifecycle for CAD environment

Domain

Semiconductor / EDA / SoC Development

Required skills

Problem solving, Debugging, Linux/Unix, Python, Shell Script (bash)

Preferred skills

DevOps, CI/CD, Jenkins, Git/Gerrit, Codex/Claude, HPC, LSF, NFS, SOC, Hardware Development, EDA

Responsibilities

Automate service-delivery lifecycle for CAD environment from provisioning through validation to monitoring and alerting

Seniority

Intern