Sr Engineer, TSE-DRAM
Core
Develop, debug, and maintain code for parallel testing of advanced memory devices using C++ and Python on automated test equipment.
Role type
Senior IC semiconductor test engineer (DRAM)
Builds
Production test flows, algorithms, and test programs for DRAM memory devices
Domain
Semiconductor manufacturing / Memory testing
Required skills
C++ programming, Python scripting, Unix/Linux command-line tools, Statistical Process Control (SPC), statistical modeling, DRAM memory device physics, CMOS transistor operation, digital logic gates, semiconductor memory testers (ATE platforms), algorithm pattern generation (APG), CMOS manufacturing knowledge
Preferred skills
Perl scripting, Design for Test (DFT), Design for Manufacturability (DFM), Design for Reliability (DFR), root cause analysis, yield evaluation, cross-functional team leadership
Technologies
C++, Python, Perl, Unix, Linux, ATE platforms, APG
Responsibilities
Develop and optimize production test flows and algorithms to reduce test times and manufacturing costs; Plan DRAM tests covering software and hardware needs, defect coverage, and characterization; Automate processes and build tools to analyze large volumes of probe data; Independently investigate test issues and identify root causes; Analyze statistical data to justify program validation and release; Evaluate yields and quality to ensure products meet specifications; Support experiments to improve yield or capacity; Contribute to cross-functional development of processes supporting the product roadmap.
