Software Engineer - Host and Network IO
Core
Develop the full IO path implementation between distributed server nodes and Cerebras' custom WSE hardware to optimize bandwidth, latency, and network traffic for AI/HPC applications.
Role type
Senior IC software engineer (host/network IO)
Builds
Custom RoCE network stack, WSE IOs, and distributed cluster IO solutions for AI/HPC
Domain
AI hardware infrastructure, high-performance networking, HPC
Deliverable
production ML models | infrastructure
Required skills
x86 & ARM software development, socket programming, RDMA Verbs, kernel bypass, zero-copy techniques, network protocol design (TCP, RoCE), driver development, network debug (Wireshark), telemetry development, cross-functional technical leadership
Preferred skills
FPGA/ASIC co-design, network switch environment familiarity (Arista, Juniper), large software environment experience
Technologies
Cerebras WSE, RoCE, TCP, Wireshark, x86, ARM
Responsibilities
Develop x86 & ARM software to expose next-generation hardware IO capabilities; Govern a generic IO API with multiple internal users; Develop control and configuration subsystems directly interacting with Cerebras hardware; Drive network performance debug of large AI clusters; Gather and analyze network statistics and packet traces to root cause bottlenecks; Develop tools/telemetry for increasing visibility into the network and IO datapath; Optimize cpu/mem utilization leveraging kernel bypass and zero-copy techniques; Integrate leading edge networking technologies and protocols; Lead cross-functional technical projects spanning multiple teams
Seniority
Senior, hands-on IC
