Senior Staff AI Accelerator Performance Architect
Core
Guide the evolution of next-generation AI systems by connecting real workloads to architectural behavior, identifying bottlenecks, and quantifying performance improvements for wafer-scale computing.
Role type
Senior Staff IC performance architect (AI accelerators)
Builds
Next-generation AI accelerator systems and wafer-scale computing platforms
Domain
AI hardware architecture, high-performance computing, transformer workloads
Deliverable
production ML models
Required skills
performance analysis, performance modeling, hardware architecture, compiler knowledge, kernel optimization, system-level behavior analysis, workload profiling, quantitative validation, architectural feature evaluation
Preferred skills
transformer inference/training analysis, GEMM/GEMV optimization, mixture-of-experts, quantization, RTL simulation, FPGA prototyping, silicon measurement, competitive accelerator analysis
Technologies
Python, C++, RTL, emulation, FPGA, silicon
Responsibilities
Own and evolve performance models for next-generation architectures; Analyze AI workloads from kernels to end-to-end execution; Identify hardware/software bottlenecks and quantify improvement opportunities; Evaluate architectural features for performance return; Partner with architecture, compiler, and runtime teams; Develop workload projections and competitive performance analyses; Create recommendations translating performance results into architectural decisions.
Seniority
Senior Staff, hands-on IC
