Hardware / Software CoDesign Engineer - 3P
Core
Co-design future hardware architectures from vendors for programmability and performance to efficiently distribute large language models across devices.
Role type
Senior IC hardware/software co-design engineer
Builds
Custom hardware platforms, kernels, and system performance models for OpenAI's supercomputing infrastructure
Domain
AI hardware, chip architecture, high-performance computing
Deliverable
production ML models
Required skills
software/hardware co-design, GPU and AI accelerator expertise, CUDA or Triton programming, low-precision ML optimization, system performance modeling, C/C++ and Python coding, deep learning computing fundamentals
Preferred skills
PhD in Computer Science/Engineering (Computer Architecture/Parallel Computing/Compilers), LLM training and inference expertise
Technologies
CUDA, Triton, C, C++, Python
Responsibilities
Co-design future hardware for programmability and performance with vendors; Assist vendors in developing optimal kernels and add compiler support; Develop performance estimates for critical kernels to drive compute core and memory hierarchy decisions; Build system performance models to drive scale-up/scale-out and networking decisions; Collaborate with ML, kernel, and compiler engineers to understand accelerator needs; Influence hardware partner roadmaps to optimize for OpenAI workloads; Evaluate potential partner accelerators and platforms.
Seniority
Senior, hands-on IC
