Software Engineer III - TeraWave
Core
Design high-performance, fast-path software for the TeraWave Point of Presence (PoP) at the intersection of the Linux kernel and user-space networking to enable global satellite connectivity.
Role type
Senior IC systems software engineer (carrier-grade networking)
Builds
High-performance packet processing applications and distributed dataplane systems for the TeraWave constellation
Domain
Space-based communications / Carrier-grade networking
Deliverable
production ML models | product features | infrastructure
Required skills
C/C++, Linux systems programming, high-performance packet processing, IP routing protocols (BGP, OSPF, IS-IS), tunneling encapsulation (SRv6, MPLS, GRE), hardware driver development, distributed system architecture
Preferred skills
DPDK, VPP, eBPF/XDP, Mellanox/NVIDIA/Intel/Broadcom silicon, CPU pinning/NUMA optimization, containerized networking (Kubernetes CNI), space systems background
Technologies
C, C++, Linux, DPDK, FD.io VPP, BGP, OSPF, IS-IS, SRv6, MPLS, GRE, SmartNICs, FPGA, Kubernetes
Responsibilities
Design and develop high-performance packet processing applications in C/C++ using DPDK and VPP; Profile and optimize software for line-rate performance at 100G/400G speeds; Implement and integrate IP routing protocols and tunneling encapsulation headers; Develop drivers and interfaces for hardware accelerators, SmartNICs, and FPGA-offload engines; Architect distributed dataplane systems scaling across PoP clusters; Provide technical leadership, conduct code reviews, and mentor junior engineers; Collaborate with platform, hardware, and network engineering teams; Drive continuous performance benchmarking and optimization
Seniority
Senior, hands-on IC with mentorship responsibilities
