Intern: Application Engineering - Digital Verification Xcelium
Core
Intern providing technical support and guidance for RTL-level digital verification products using Cadence Xcelium simulator and related tools.
Role type
Intern, Application Engineer (Digital Verification)
Builds
Technical support workflows and customer success for RTL verification solutions
Domain
Semiconductor design / Electronic design automation (EDA) / Digital Verification
Deliverable
client delivery
Required skills
Root cause analysis, scripting (TCL, Python), RTL verification concepts, technical documentation
Preferred skills
University knowledge of scripting languages, exposure to Verilog or VHDL
Technologies
Xcelium, TCL, Python, Verilog, VHDL
Responsibilities
Provide technical support to customers and field personnel, conduct root cause analysis and provide resolution, follow up with customer test cases, collaborate with R&D on issues, author application notes
Seniority
Intern, mentored role