TFT Process R&D engineer II (Display Lab) - (E2)
Core
Designing and optimizing manufacturing processes for display and semiconductor technologies, including hardware characterization, data analysis, and troubleshooting engineering issues.
Role type
Process R&D Engineer II (Display Lab)
Builds
Manufacturing processes for display and semiconductor chips
Domain
Semiconductor and Display manufacturing
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Hardware characterization, Root Cause Analysis, film property measurement, Design of Experiments (DoE), JMP software, technical documentation, vendor management, independent research
Preferred skills
Prior experience in semiconductor/display/equipment supplier companies, advanced analytical skills
Technologies
JMP, DoE
Responsibilities
Design and analyze moderately difficult process engineering experiments, perform hardware characterization on moderately difficult systems, troubleshoot moderately complex process engineering issues, measure film properties and interpret data, generate internal technical documentation and reports, interact with customers to resolve process issues, identify and work with vendors and suppliers
Seniority
Mid-level IC
