Etch Engineer - Process Owner
Core
Develop and optimize FEOL and BEOL plasma etch processes for emerging GAA architectures (2nm) and mature nodes (14nm, 17nm, 28nm), implementing APC methodologies and conducting root-cause analysis for yield excursions.
Role type
Senior IC semiconductor process engineer (plasma etch)
Builds
Production-ready semiconductor manufacturing processes for advanced nodes and memory devices
Domain
Semiconductor manufacturing (FEOL/BEOL)
Required skills
Plasma etch process development, Advanced Process Control (APC), Statistical Process Control (SPC), Fault Detection and Classification (FDC), Design of Experiments (DOE), Root-cause analysis, Semiconductor metrology (SEM, EDX), Tool qualification, Yield analysis, Python/Statistical analytics
Preferred skills
GAA/Nanosheet technology experience, Copper to Copper Hybrid Bonding, Factory ramp-up support
Technologies
LAM Research FLEX/KIYO, TEL, Applied Materials, Mattson, PSK, SEMES, Spotfire, JMP, Minitab
Responsibilities
Develop and optimize FEOL/BEOL plasma etch processes for GAA and FinFET nodes; Implement APC methodologies including feed-forward control; Perform SPC/FDC monitoring and root-cause investigations for process excursions; Qualify and integrate heterogeneous etch tool platforms; Conduct process matching and technology transfer across global sites; Support factory ramp-up and capacity optimization; Perform failure analysis and material characterization using SEM/EDX.
Seniority
Senior, hands-on IC