CareerPlan

Senior CMP Process engineer

1530 FM 973 Taylor, TX, USAFull-time$106k2026-10-12 → 2026-11-10
On-siteU.S. persons only (export control)

Core

Planarizing wafer surfaces using Chemical Mechanical Polishing (CMP) to ensure high-precision chip layering.

Role type

Senior IC CMP Process Engineer

Builds

Semiconductor wafers for advanced chip manufacturing

Domain

Semiconductor manufacturing / Chemical Mechanical Polishing

Required skills

CMP fundamentals (dielectric/metal), Statistical Process Control (SPC), Fault Detection and Classification (FDC), root-cause analysis (FMEA/8D), DOE, JMP/Spotfire analysis

Preferred skills

Metrology tools (Ellipsometry/SEM/AFM), defect reduction, fab integration knowledge

Technologies

AMAT, Ebara, JMP, Spotfire

Responsibilities

Control Removal Rate (RR) and thickness skew, optimize process conditions for uniformity, manage recipes (RCP) for flatness, manage defects and uniformity, monitor consumable life cycles, evaluate slurry and pad performance

Seniority

Senior, hands-on IC