Experienced Defect Control Engineer
Core
Guardian of wafer quality responsible for rapid identification, containment, and eradication of defect excursions in semiconductor fabrication.
Role type
Senior IC defect control engineer
Builds
Zero defective wafers escape the factory
Domain
Semiconductor manufacturing (Metrology, Unit Process, Yield Engineering)
Required skills
Defect root cause analysis, Metrology tool operation, Cross-functional leadership, SOP development, Knowledge management, Statistical process control
Preferred skills
Structured Problem Solving (SPS), Six Sigma, QMS, ISO 9000
Technologies
KLA-Tencor, AMAT
Responsibilities
Lead rapid identification and classification of defect excursions using advanced metrology tools; Spearhead deep-dive investigations into unknown defect sources; Chair and facilitate cross-functional "War Room" meetings to drive containment strategies; Develop and validate enhancements to SOPs for Shift Technicians; Document defect signatures and image databases; Partner with Unit Process owners to implement corrective actions and prevent defect reoccurrence; Collaborate with Metrology and Defect Engineering to ensure statistical process limits are appropriate.
Seniority
Senior, hands-on IC