Experienced Engineer, Defect Control Engineering
Core
Provide engineering support to the A Shift Technician Sustaining team to investigate, analyze, and resolve 1st line defect excursions and quality impacts in semiconductor manufacturing.
Role type
Defect Control Engineer (Semiconductor Process)
Builds
Defect containment strategies and process improvements for logic technology nodes
Domain
Semiconductor manufacturing (Logic, 45nm or below)
Deliverable
Production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Semiconductor process engineering, defect monitoring and reduction, root cause analysis, data analysis, SPC, DOE methodology, defect morphology understanding, cross-functional communication
Preferred skills
Leading logic technology development, advanced defect inspection tools (bright field, dark field, e-beam, Vis-edge), Klarity Defect software, data mining, troubleshooting
Technologies
Klarity Defect, SPC, DOE
Responsibilities
Develop broad process flow knowledge of defect source and morphology; Aid DC technicians with BBT/scrap/dog tool investigation and lot disposition; Perform on-shift fab process/tool trend data and correlation analysis; Coordinate activities with DE layer owners for defect classification updates; Perform data analysis to identify missed defect excursion signals
Seniority
Mid-level, hands-on IC
