FPGA Post Silicon Validation Engineer
Core
Lead device-level and IP-level validation of FPGA configuration flows, secure boot, root-of-trust, and HPS subsystems for next-generation FPGA and SoC devices.
Role type
Senior IC validation engineer (FPGA/SoC security & configuration)
Builds
Validation strategies, test cases, and automation infrastructure for FPGA configuration, security features, and HPS integration
Domain
Semiconductor hardware validation, FPGA architecture, hardware security, SoC bring-up
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
silicon validation, FPGA configuration architecture, hardware security (secure boot, encryption, key management), HPS/embedded processor validation, system-level debug, fault injection, test automation
Preferred skills
Python scripting, Verilog, SoC architecture knowledge
Technologies
Python, Verilog, FPGA evaluation boards, reference platforms
Responsibilities
Develop validation strategies for FPGA config/security/HPS; validate config flows (cold/warm/partial reconfig); perform security feature validation (boot, auth, encryption); validate HPS functionality (boot, reset, memory); create/execute test vectors for robustness and fault injection; debug silicon issues and bring-up failures; drive validation automation and infrastructure innovation
Seniority
Senior, hands-on IC (8+ years experience)
