Hardware Security Architect
Core
Define and drive hardware security architecture for System-on-Chip (SoC) designs, establishing vision for future security generations and integrating cryptographic IP.
Role type
Senior Hardware Security Architect
Builds
Secure SoC designs with integrated hardware security modules (HSM), secure boot, and runtime protection
Domain
Semiconductor / Hardware Security
Deliverable
production ML models | product features | infrastructure
Required skills
SoC architecture design, HW/SW interaction, threat modeling, risk assessment, RTL design review, EDA flows, cryptographic IP integration, secure key storage strategies, ISO 21434 compliance, PPA optimization
Preferred skills
AMBA/AXI interconnects knowledge, memory subsystem expertise, ISO 26262/IEC 61508 standards familiarity, cross-functional collaboration
Technologies
AES, SHA, PKA, PUF, PQC, eFUSE, OTP, ISO 21434, ISO 26262, IEC 61508
Responsibilities
Define SoC hardware security architecture and requirements; translate security features into high-level HW/SW specifications; lead threat modeling and vulnerability analysis; architect HW/SW security boundaries and co-design flows; define secure key storage and DFT/TEST strategies; collaborate with cross-functional teams to embed security in implementation; ensure compliance with cybersecurity and safety standards.
Seniority
Senior, hands-on IC
