Systems Verification & Concurrent Kernel Architecture Research Intern
Core
Researching automated formal methods to guarantee the safety of concurrent kernel primitives and bridging the logic-to-silicon gap in low-level systems.
Role type
Research intern (concurrent kernel architecture & systems verification)
Builds
High-assurance concurrent kernel primitives and verified low-level system components
Domain
Operating Systems / Computer Architecture / Formal Methods
Required skills
C programming, ARMv8 assembly, TLA+, Spin, ESBMC, CBMC, SMT-based verification, LLMs for formal invariant synthesis, memory model reasoning, cache coherency understanding
Preferred skills
PhD or Master's in CS/Engineering/Mathematics, publications in formal methods or systems, experience with weak-memory hardware
Technologies
TLA+, Spin, ESBMC, CBMC, ARMv8, RISC-V, LLMs
Responsibilities
Design locking protocols using TLA+/Spin to prove absence of deadlocks, Apply Bounded Model Checking to C source for data races and pointer safety, Verify memory barrier placement for hardware synchronization, Leverage LLMs to synthesize formal invariants and audit results
Seniority
Intern, research-focused
