Principal / Senior / Engineer, DRAM Reliability
Core
Analyze DRAM device/process reliability (hot carrier, bias temperature instability, electromigration) and build reliability models to guide technology development.
Role type
Senior IC reliability engineer (semiconductor device physics)
Builds
Reliability models and actionable recommendations for DRAM technology scaling
Domain
Semiconductor manufacturing / Memory storage
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Semiconductor device physics, DRAM architecture, statistical data analysis, semiconductor device parametric measurement, circuit operation basics, process integration knowledge
Preferred skills
Programming languages, electrical analysis, circuit operation and DRAM product architecture
Technologies
Parameter Analyzers, Pulse Generators, Capacitance Meters, Wafer Probers
Responsibilities
Develop and implement test methodologies to evaluate wafer-level & circuit-level reliability behavior; Analyze results and create reports to deliver decision-ready recommendations; Collaborate with Process Integration and characterization teams to correlate reliability signature with process conversions; Integrate data sources (inline metro, param, probe) to model physical understanding; Build reliability models and consult with device and circuit design teams
Seniority
Senior, hands-on IC
