EUV Lithography Process Development Engineer- TPG
Core
Evaluating and enabling next-generation EUV and High NA EUV lithography technologies to support advanced memory scaling and production readiness.
Role type
Senior IC lithography process development engineer
Builds
Next-generation patterning solutions for memory and storage devices
Domain
Semiconductor manufacturing / EUV lithography
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
EUV lithography expertise, 193nm immersion multiple patterning (LELE, SAQP), photolithography optics knowledge, simulation tools (Prolith, S-Litho), process transfer alignment, defect inspection strategy definition
Preferred skills
High NA EUV pathfinding experience, statistical analysis and design of experiments, JMP or Python, AI-assisted analytics for yield improvement
Technologies
EUV tools, 193nm immersion scanners, Prolith, S-Litho, JMP, Python
Responsibilities
Lead pathfinding efforts for advanced patterning technologies across 193nm immersion, EUV, and High NA EUV; Develop and optimize EUV lithography modules in the technology development environment; Partner with defect inspection and mask teams to define EUV mask inspection strategies; Collaborate with manufacturing sites to align process transfer, equipment, and materials readiness; Travel as needed to support High NA EUV development and early learning activities
Seniority
Senior, hands-on IC