DMTS, DRAM Architecture
Core
Define end-to-end DRAM system architectures and guide long-term technology direction for next-generation memory platforms.
Role type
Senior technical leadership DRAM architecture engineer
Builds
Scalable DRAM systems and memory technologies
Domain
Semiconductor / Memory Systems
Deliverable
production ML models | product features
Required skills
DRAM system architecture, silicon architecture translation, RAS features design, telemetry architecture, cross-stack co-optimization, AI/LLM application for engineering efficiency
Preferred skills
PhD in technical field, tier-1 customer engagement, architectural innovations adopted into production
Technologies
AI, LLMs
Responsibilities
Define next-generation DRAM system architectures across performance, capacity, RAS, and telemetry; Lead cross-stack co-optimization across silicon, package, module, board, and system; Architect advanced RAS and telemetry features and translate system requirements into silicon; Drive long-range memory technology strategy and influence industry standards; Serve as a senior technical interface to customers, executives, and partners
