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SENIOR ENGINEER, ASIC TEST

Fab 10A, Singapore💼 Full-time🗓 2026-05-26 → 2026-07-30

Core

Design and deliver cutting-edge ATE test solutions for HBM-DRAM devices, leading test plan development, silicon validation, and high-volume production support.

Role type

Senior IC ATE Test Engineer (Semiconductor)

Builds

Test programs, test hardware, and validation methodologies for HBM-DRAM products

Domain

Semiconductor manufacturing / Memory storage / ATE platforms

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

ATE test program development and debugging, Advantest V93K platform proficiency, Python/C++ scripting, SoC testing concepts, DFT concepts (MBIST, SCAN), test flow development, high-volume manufacturing (HVM) experience

Preferred skills

Semiconductor manufacturing process knowledge, test data analysis tools (STDF, JMP), lab equipment familiarity

Technologies

Advantest V93K, Python, C/C++, STDF, JMP

Responsibilities

Develop and implement robust test strategies and ATE programs for HBM-DRAM devices; Drive silicon validation, characterization, and yield improvement initiatives; Design and debug test hardware including schematic capture and PCB layout; Collaborate cross-functionally to integrate test solutions into production; Support high-volume manufacturing and troubleshoot complex test issues

Seniority

Senior, hands-on IC

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